Features

• Thread window for determination of worst case thread length
• Channel nodes observable in logic analyzer window
• Thread Activity observable in logic analyzer window
• Automation, launch from command shell specifying project and script files. A single pass/fail exit code. Run multiple tests by launching multiple times from a batch file, no user intervention is required!
• Superior tracing, including pin transitions, parameter RAM I/O, and capture/match events saved to the trace buffer.
• Stream trace data to a file, ideal for post processing. Two file formats are provided, one is optimized for viewing and the other for parsing.
• All Freescale TPUs are supported, including TPU1, TPU2, and TPU3.
• Powerful C-like script command language.
• Powerful test vector generation language with embedded loops and node grouping.
• Integrated graphical logic analyser that supports 30 nodes with zoom control, scrolling, cursors, windows resizing, etc.
• Powerful execution control including goto cursor (instruction or script command), breakpoints, single step (instruction or script command), step in, step over, step out, step atomic, goto time, goto delta time, etc.
• An auto-detect feature to determine the target.
• Association of ISR script commands files with interrupts. Script commands files can be associated with TPU interrupts. When the interrupt associated with a particular TPU channel becomes asserted the ISR script commands file associated with that channel gets executed.
• Direct register modification. Allows register modification within the IDE, bypassing the script file.
• Editable memory window.
• Functional verification. Allows you to define your code requirements in terms of pin transitions and data flow and automatically verify your code against these requirements. This will run in batch mode and will generate PASS/FAIL report files. Great for formal code verification! (Helps with DO178B.)
• Code and jump coverage analyses. Helps you meet the requirements of DO178B by telling you how complete your test cases are.
• External logic simulation. Helps to model the external system by instantiation of Boolean logic external to the TPUs. Thus inputs can be driven by combinatorial logic applied to outputs. This can be particularly helpful in the modelling of communications channels such as CAN or RS485 where an output channel can be wrapped around to drive an input channel.
• Integrated timers to aid performance analysis.
• Support for automated verification. Trace buffers, allowing you to find source code line of traced instruction.
• Code coverage analysis.
• TPUMASM support. Supports Freescale's TPUMASM TPU Microcode Assembler, TPUMASM.exe.
• Complete user manual and context-sensitive, on-line help.
• User-friendly interface, which runs under Windows XP, 2000, NT 4.0, 98, 95, ME.
• Web software upgrades.